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HV518 32-Channel Vacuum-Fluorescent Display Driver
Ordering Information
Package Options Device HV518 40 Pin Dip HV518P 44 Plastic Chip Carrier HV518PJ Die HV518X
Features
32 output lines 90V output swing Active pull-down Latches on all outputs Up to 6MHz @ VDD = 5V -40C to +85C operation
General Description
The HV518 is designed for vacuum fluorescent or DC plasma applications, where it can serve as a segment, digit or matrix display driver. Each device has 32 outputs, 32 latches and a 32 bit cascadable shift register. Serial data enters the shift register on the LOW-to-HIGH transition of the clock input. With latch enable (LE) HIGH, parallel data is transferred to the output buffers through a 32-bit latch. When LE is low the data is stored in the latch. When STROBE is LOW, all outputs are enabled; if STROBE is HIGH, all outputs are LOW.
Absolute Maximum Ratings
Supply voltage, VDD 1 Supply voltage, VPP Logic input levels1
2,3 1
-0.5V to +6.0V -0.5V to +90V -0.5V to VDD +0.5V 1200mW -40C to +85C -65C to +150C 260C
Continuous total power dissipation Operating temperature range Storage temperature range
Lead temperature 1.6mm(1/16 inch) from case for 10 seconds
Notes: 1. All voltages referenced to GND. 2. Duty cycle is limited by the total power dissipated in the package. 3. For operation above 25C ambient, derate linearly to 85C at 20mW/C.
12/13/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the 1 Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
HV518
Electrical Characteristics
(over recommended ranges of operating free-air temperature and VDD. Unless otherwise noted, VPP = 80V)
Symbol IDD IDDQ IPP Supply current Quiescent supply current Supply current 7 Parameter Min Typ Max 10 0.5 12 10 500 VOH VOL IIH IIL High-level output voltage HVoutput Serial output Low-level output HVoutput Serial output High-level logic input current Low-level logic input current 0.06 0.1 -0.1 70.0 4.5 4.9 5 5 0.8 1 -1 Units mA mA mA mA A V V V V A A Conditions VDD = 5V, fCH = 6.0 MHz VDD = 5.5V, VIN = 0V Output high, TA = -40C Output high, TA = 0 to +85C Outputs low IOH= -25mA VDD = 5V, IOH = -20A IOL= 1mA IOL =20A VIH = VDD VIL = 0V
Note: The total number of ON outputs times the duty cycle must not exceed the allowable package power disspation.
Switching Characteristics (VPP = 80V, CL = 50 pF, TA = 25C, unless otherwise noted)
Symbol td tDHL tDLH tTHL tTLH Parameter Delay time, Clock to data output Delay time, high-to-low-level, HVoutput Delay time, low-to-high-level HVoutput from latch enable from strobe from latch enable from strobe VDD = 4.5V VDD = 4.5V VDD = 4.5V VDD = 4.5V VDD = 4.5V Min Max 600 1.5 1 1.5 1 3 2.5 s s s Unit ns s Conditions CL =15 pF See Figure 4 See Figure 5 See Figure 6 See Figure 5 See Figure 6 See Figure 6 See Figure 6
Transition time, high-to-low-level, HVoutput Transition time, low-to-high-level, HVoutput
Recommended Operating Conditions (TA = 25C, unless otherwise noted)
Symbol VDD VPP VIH VIL IOH IOL fCLK tw(CKH) tw(CKL) tsu th TA Logic voltage supply High voltage supply High-level input voltage (See Fig.3.) Low-level input voltage (See Fig. 3.) High-level output current Low-level output current Clock frequency (see Figure 3) Pulse duration , clock high Pulse duration , clock low Setup time, data before clock Hold time, data after clock Operating free-air temperature VDD = 4.5V VDD = 4.5V VDD = 4.5V VDD = 4.5V VDD = 4.5V 83 83 75 75 -40 85 VDD = 4.5V VDD = 4.5V -25 2 6.0 Parameter Min 4.5 8 3.5 1 Max 5.5 80 Units V V V V mA mA MHz ns ns ns ns C
Note: Power-up sequence should be the following: 1. Connect ground. 2. Apply VDD. 3. Set all inputs (Data, CLK, Enable, etc.) to a known state. Power-down sequence should be the reverse of the above.
4. 5.
Apply VPP. The VPP should not drop below VDD or float during operation.
2
HV518
Input and Output Equivalent Circuits
VDD VDD VPP
Input
Data Out
HVOUT
GND Logic Inputs
GND Logic Data Output
GND High Voltage Outputs
Parameter Measurement Information
t w(CKH) V IH Clock 50% V IL t w(CKL) t su Data In V IL th V IH HV Output 10% V OL 90% t DLH or t DHL V OH Latch Enable V IH 50% V IL
Figure 3: Input Timing Voltage Waveforms
Figure 5
t w(CKH) Clock V IH 50% V IL td Data Output V OH 50% V OL
V IH Strobe t DLH HV Output 50% V IL t DHL 90% 10% t TLH t THL V OH V OL
Figure 4
Note: For testing purposes, all input pulses have maximum rise and fall times of 30 nsec.
Figure 6: Switching-Time Voltage Waveforms
3
HV518
Block Diagram
LE
STB
V PP
HV OUT1 D IN 32-Bit CLK Shift Register D OUT HV OUT 32 Latches
Truth Tables
Input
Data In H L X
* Previous state
Output
CLK Data Out H L No Change * Data In X H L X
* Previous state
LE X H H L
STB H L L L
HV Outputs All Low High Low *
Typical Operating Sequence
Clock ***
Data In
VALID
IRRELEVANT
SR Contents
INVALID
VALID
Latch Enable
Latch Contents
PREVIOUSLY STORED DATA
NEW DATA VALID
Strobe
HV Output
VALID
4
HV518
Pin Configurations
HV518 40 Pin Dual-In-Line Package Pin Function Pin 1 VPP 21 2 Serial Out 22 3 HVOUT 32 23 4 HVOUT 31 24 5 HVOUT 30 25 6 HVOUT 29 26 7 HVOUT 28 27 8 HVOUT 27 28 9 HVOUT 26 29 10 HVOUT 25 30 11 HVOUT 24 31 12 HVOUT 23 32 13 HVOUT 22 33 14 HVOUT 21 34 15 HVOUT 20 35 16 HVOUT 19 36 17 HVOUT 18 37 18 HVOUT 17 38 19 Strobe 39 20 GND 40
Package Outline
1 40
Function Clock LE HVOUT 16 HVOUT 15 HVOUT 14 HVOUT 13 HVOUT 12 HVOUT 11 HVOUT 10 HVOUT 9 HVOUT 8 HVOUT 7 HVOUT 6 HVOUT 5 HVOUT 4 HVOUT 3 HVOUT 2 HVOUT 1 Data In VDD
20 top view 40-pin DIP
21
HV518 44 Pin J-Lead Package Pin Function 1 VPP 2 Serial Out 3 HVOUT 32 4 HVOUT 31 5 HVOUT 30 6 N/C 7 HVOUT 29 8 HVOUT 28 9 HVOUT 27 10 HVOUT 26 11 HVOUT 25 12 HVOUT 24 13 HVOUT 23 14 HVOUT 22 15 HVOUT 21 16 HVOUT 20 17 HVOUT 19 18 N/C 19 HVOUT 18 20 HVOUT 17 21 Strobe 22 GND
39 38 37 36 35 34 33 32 31 30 29 40 41 42 43 44 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 28 27 26 25 24 23 22 21 20 19 18
Pin 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44
Function Clock LE HVOUT 16 HVOUT 15 HVOUT 14 N/C N/C HVOUT 13 HVOUT 12 HVOUT 11 HVOUT 10 HVOUT 9 HVOUT 8 HVOUT 7 HVOUT 6 HVOUT 5 HVOUT 4 HVOUT 3 HVOUT 2 HVOUT 1 Data In VDD
top view
12/13/010
(c)2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
5
1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 * FAX: (408) 222-4895 www.supertex.com

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